ρ-VEX: A parameterizable and reconfigurable VLIW processor core for Molen
نویسنده
چکیده
For my MSc project at the Computer Engineering Laboratory at Delft University of Technology I will design and implement a reconfigurable Very Large Instruction Word (VLIW) processing core, for use within the Molen[6, 9] reconfigurable processing paradigm. The Instruction Set Architecture (ISA) used for this processing core will be VEX[2] (VLIW Example), which is loosely modeled on the ISA of the HP/ST Lx[1] family of VLIW embedded cores.
منابع مشابه
ρ-VEX: A Reconfigurable and Extensible Softcore VLIW Processor
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